Back-illuminated type solid-state imaging device

ABSTRACT

A back-illuminated type solid-state imaging device is provided in which an electric field to collect a signal charge (an electron, a hole and the like, for example) is reliably generated to reduce a crosstalk. 
     The back-illuminated type solid-state imaging device includes a structure  34  having a semiconductor film  33  on a semiconductor substrate  31  through an insulation film  32,  in which a photoelectric conversion element PD that constitutes a pixel is formed in the semiconductor substrate  31,  at least part of transistors  15, 16,  and  19  that constitute the pixel is formed in the semiconductor film  33,  and a rear surface electrode  51  to which a voltage is applied is formed on the rear surface side of the semiconductor substrate  31.

CROSS REFERENCES TO RELATED APPLICATIONS

The present application is a continuation application of U.S. patentapplication Ser. No. 14/052,323, filed Oct. 11, 2013, which is acontinuation application of U.S. patent application Ser. No. 12/970,419,filed Dec. 16, 2010, which is a Divisional application of U.S. patentapplication Ser. No. 12/694,338, filed Jan. 27, 2010, which is aDivisional application of U.S. patent application Ser. No. 11/268,965,filed Nov. 8, 2005, and claims the priority from prior Japanese PriorityPatent Application JP 2004-363580 filed in the Japan Patent Office onDec. 15, 2004. Each of the above-referenced applications is herebyincorporated herein by reference in its entirety.

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention relates to a back-illuminated type solid-stateimaging device, particularly, to a CMOS solid-state imaging device of aback-illuminated type and a method for manufacturing thereof.

Description of the Related Art

In the past, a CMOS solid-state imaging device of a back-illuminatedtype in which light is made incident from the rear surface side of asubstrate to improve efficiency in using light and to obtain highsensitivity has been proposed as a CMOS solid-state imaging device. Thisback-illuminated type CMOS solid-state imaging device has a structure inwhich a CMOS transistor that constitutes a pixel is formed on the frontsurface side of a semiconductor substrate, a light receiving portionthat becomes a photoelectric conversion element is formed to face therear surface side of the substrate, and a multi-layer wiring is formedon the front surface side of the substrate, to make light incident fromthe rear surface side of the substrate. In this case, the rear surfaceon the opposite side to the front surface side where the multi-layerwiring of the semiconductor substrate is formed is polished tomanufacture this solid-state imaging device.

In order to polish the semiconductor substrate stably, it is preferablethat the thickness of a substrate is approximately 10 μm including amargin. Further, from a view point of sensitivity of red, it ispreferable that the substrate has the thickness of this range. Here, incase of blue light and the like, since the photoelectric conversion isperformed at a shallow position after the light is incident on the rearsurface side of a silicon semiconductor substrate, it is necessary for aphotoelectron to move a distance of approximately 10 μm until a chargeaccumulation portion on the front surface side.

On the other hand, a pixel pitch of, for example, 4 μm or less is notrare in recent years, and an aspect ratio (=substrate thickness/pixelpitch) becomes very large to be 3 or more in case of such minute pixelpitch. When the aspect ratio is large, it is difficult to manufacture aphotoelectric conversion element of such shape and in addition, aphotoelectron happens to enter an adjacent pixel while moving to thecharge accumulation portion, which causes a crosstalk. Here, thecrosstalk means that a signal of an adjacent pixel is mixed into asignal of an original pixel. When the crosstalk increases, a resolutionbecomes low and a color mixture occurs frequently in case of a CMOSsolid-state imaging device of a single-plate type in which a colorfilter is attached to each pixel.

As a countermeasure for the above, Patent reference 1 proposes one inwhich an electric field is formed in a semiconductor substrate in a CMOSsolid-state imaging device of a back-illuminated type. Since theelectric field is formed, it becomes easy for a photoelectron to move inthe depth direction of the substrate and the crosstalk can be reduced.

As another example of related art, the non-patent reference 1 has beenpresented.

[Patent Reference 1] Published Japanese Patent Application No.2003-338615

[Non-patent Reference 1] Process and Pixels for High Performance Imagerin SOI-CMOS Technology (authors: Xinyu Zheng, Sures hSeahadri, MichaelWood, Chris Wrigley, and Bedabrate Pain) presented in Session 3 of 2003IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors

SUMMARY OF THE INVENTION

The above-described method of reducing the crosstalk by forming theelectric field in the semiconductor substrate, which is described in thepatent reference 1, is excellent in principle, however, there has been alimit to a strength of the electric field to be formed in a scope thatis disclosed in an embodiment as a specific example thereof. When theelectric field is formed by making use of a concentration gradient of anepitaxial layer, a potential difference of 1.1V or more which is a bandgap of silicon may not be obtained. In addition, when an electrode isprovided in the rear surface of the substrate, only a small voltage canbe applied to the rear surface electrode in order not to make electriccurrent flow between the rear surface electrode and a p-typesemiconductor well region if a structure shown in FIGS. 7 and 8 of thepatent reference 1 is used without modification.

On the other hand, in case of the non-patent reference 1, a pixelcircuit is formed on an SOI (Semiconductor On Insulator) substrate and aphoto diode is formed in a silicon substrate on the lower side. In thisthesis, a light incident plane is not a rear surface but a frontsurface. Therefore, there is no awareness of the above-describedproblem, and accordingly there is no description with respect to amethod for leading a photoelectron generated on the rear surface side tothe front surface side.

Further, an electronic shutter operation is performed through a resettransistor in the CMOS solid-state imaging device of theback-illuminated type, and it has been difficult to operate anelectronic shutter simultaneously with respect to all pixels. Inaddition, there also has been a desire for a further improvement ofsensitivity in the CMOS solid-state imaging device of theback-illuminated type.

In view of the problems described above, the present invention providesa solid-state imaging device of a back-illuminated type in which anelectric field to collect a signal charge (an electron, a hole, and thelike, for example) is reliably generated to reduce the crosstalk.

Further, the present invention provides a solid-state imaging device ofa back-illuminated type that enables an electronic shutter to beoperated simultaneously with respect to all pixels, and a solid-stateimaging device of a back-illuminated type in which a further improvementof sensitivity can be expected.

In addition, the present invention provides a method for manufacturingthose solid-state imaging devices.

A back-illuminated type solid-state imaging device according to anembodiment of the present invention includes a semiconductor film on asemiconductor substrate through an insulation film, wherein aphotoelectric conversion element that constitutes a pixel is formed inthe semiconductor substrate, at least part of transistors thatconstitute the pixel is formed in the semiconductor film, and a rearsurface electrode to which a voltage is applied is formed on the rearsurface side of the semiconductor substrate.

In the above-described back-illuminated type solid-state imaging deviceof the present invention, the semiconductor substrate may be formed byusing such a high resistance substrate that depletion layers from boththe front and rear surfaces are linked with a voltage applied to therear surface electrode.

In this back-illuminated type solid-state imaging device of the presentinvention, the voltage of the rear surface electrode during a lightreceiving period may be set to a voltage of a first polarity.

In this back-illuminated type solid-state imaging device of the presentinvention, a charge injection preventive film (an electron injectionpreventive film in case that the signal charge is an electron, and ahole injection preventive film in case that the signal charge is a hole,for example) may be formed between the rear surface electrode and thesemiconductor substrate.

In the above-described back-illuminated type solid-state imaging deviceof the present invention, an electrically floating semiconductor layerof an opposite conduction type to a charge accumulation portion of aphotoelectric conversion element may be formed in the semiconductorsubstrate under the insulation film.

In the above-described back-illuminated type solid-state imaging deviceof the present invention, a semiconductor layer of an oppositeconduction type to a charge accumulation portion of a photoelectricconversion element may be formed in the semiconductor substrate underthe insulation film and the same voltage as the voltage applied to therear surface electrode may be applied to this semiconductor layer.

In the above-described back-illuminated type solid-state imaging deviceof the present invention, a first semiconductor layer of an oppositeconduction type to a charge accumulation portion of a photoelectricconversion element may be formed in the semiconductor substrate underthe insulation film and a second semiconductor layer of an oppositeconduction type to the first semiconductor layer that becomes part ofthe photoelectric conversion element may be formed under the firstsemiconductor layer.

In the above-described back-illuminated type solid-state imaging deviceof the present invention, an interface between the solid-state imagingdevice and the outside may include both bumps and wire bonding to therear surface electrode.

In the above-described back-illuminated type solid-state imaging deviceof the present invention, the photoelectric conversion element may bereset by applying a voltage of a second polarity to the rear surfaceelectrode.

In the above-described back-illuminated type solid-state imaging deviceof the present invention, a transfer transistor constituting the pixelmay be formed in the semiconductor film.

In the above-described back-illuminated type solid-state imaging deviceof the present invention, a transfer transistor constituting the pixelmay be formed in the semiconductor substrate and the photoelectricconversion element is formed into a buried type.

According to the present invention, in the above-describedback-illuminated type solid-state imaging device in which the voltage ofthe rear surface electrode is made to be the voltage of the firstpolarity and the charge injection preventive film is provided betweenthe rear surface electrode and the semiconductor substrate, a chargemultiplication can be performed in the semiconductor substrate.

A method for manufacturing a back-illuminated type solid-state imagingdevice according to an embodiment of the present invention includes theprocesses of: preparing a substrate having a semiconductor film on asemiconductor substrate through an insulation film, forming in thesemiconductor substrate a photoelectric conversion element thatconstitutes a pixel, forming in the semiconductor film at least part oftransistors that constitute the pixel, and forming on the rear surfaceside of the semiconductor substrate a rear surface electrode to which avoltage is applied.

In the above-described method for manufacturing the back-illuminatedtype solid-state imaging device of the present invention, thesemiconductor substrate may be formed by using such a high resistancesubstrate that depletion layers from both the front and rear surfaces ofthe substrate are linked with the voltage applied to the rear surfaceelectrode.

The above-described method for manufacturing the back-illuminated typesolid-state imaging device of the present invention may further includea process of forming on the rear surface of the semiconductor substratebefore forming the rear surface electrode a charge injection preventivefilm (an electron injection preventive film in case that a signal chargeis an electron, and a hole injection preventive film in case that thesignal charge is a hole, for example).

The above-described method for manufacturing the back-illuminated typesolid-state imaging device of the present invention may further includea process of forming in the semiconductor substrate under the insulationfilm a semiconductor layer of an opposite conduction type to a chargeaccumulation portion of the photoelectric conversion element.

In the above-described method for manufacturing the back-illuminatedtype solid-state imaging device of the present invention, transistorsincluding a transfer transistor that constitute the pixel may be formedin the semiconductor film.

The above-described method for manufacturing the back-illuminated typesolid-state imaging device of the present invention may further includea process of forming a transfer transistor among transistors thatconstitute the pixel and forming the photoelectric conversion element tobe a buried type in the semiconductor substrate.

According to the back-illuminated type solid-state imaging device of thepresent invention, the photoelectric conversion element that constitutesthe pixel is formed in the semiconductor substrate under the insulationfilm, at least part of transistors that constitute the pixel is formedin the semiconductor film on the insulation film, and the rear surfaceelectrode is formed on the rear surface side of the semiconductorsubstrate, and so by applying a required voltage, which is, for example,a negative voltage when an electron is a signal charge and a positivevoltage when a hole is a signal charge, to the rear surface electrode,the electric field to collect the signal charge can be generatedreliably in the photoelectric conversion element and the crosstalk tothe adjacent pixels can be reduced.

With the above-described semiconductor substrate being formed using ahigh resistance substrate, in which the depletion layers from both thefront and rear surfaces of the substrate are linked when a voltage isapplied to the rear surface electrode, a photoelectric conversion in thehigh resistance substrate can be made reliably and the electric field tocollect the signal charge can be generated reliably.

By making the voltage of the rear surface electrode during the lightreceiving period set to the voltage of the first polarity, which is, forexample, the negative voltage when the electron is the signal charge andthe positive voltage when the hole is the signal charge, the electricfield to collect the signal charge can be generated reliably in thephotoelectric conversion element.

By forming the charge injection preventive film between the rear surfaceelectrode and the semiconductor substrate, the injection of the chargefrom the rear surface electrode to the semiconductor substrate can beprevented when the voltage of the first polarity is applied to the rearsurface electrode.

By forming the electrically floating semiconductor layer of the oppositeconduction type to the charge accumulation portion of the photoelectricconversion element in the semiconductor substrate under the insulationfilm, the electric current can be prevented from flowing when thevoltage of the first polarity is applied to the rear surface electrodeto generate the electric field. Further, a charge from an interface isrecombined by means of this electrically floating semiconductor layer,and a dark current can be suppressed.

By applying the same voltage as the rear surface electrode to theabove-described semiconductor layer of the opposite conduction type, theelectric field is generated in the semiconductor substrate and theelectric current can be prevented from flowing.

By forming the second semiconductor layer of the opposite conductiontype, which is opposite to the above-described first semiconductor layerof the opposite conduction type, under the first semiconductor layer,the electric field may be almost vertically generated in thesemiconductor substrate, and a collection of the signal charge can beimproved to be performed uniformly.

The solid-state imaging device interfaces the outside using the bumpsand wire bonding, which is easy to be carried out.

By applying to the rear surface electrode the voltage of the secondpolarity, which is, for example, the positive voltage when the electronis the signal charge and the negative voltage when the hole is thesignal charge, the photoelectric conversion element can be reset, thatis, the signal charges accumulated in all the pixels are discharged tothe rear surface electrode side and the simultaneous electronic shutteroperation to all the pixels can be performed.

By forming transistors including the transfer transistor in thesemiconductor layer on the insulation film, the pixel can be formed tohave one photoelectric conversion element and a plurality of transistorsincluding the transfer transistor.

By forming the transfer transistor in the semiconductor substrate underthe insulation film, the pixel can be formed to have one photoelectricconversion element and a plurality of transistors including the transfertransistor. In addition, by making the photoelectric conversion elementformed into the buried type, the charge from the interface can berecombined and the dark current can be suppressed.

With the voltage to the rear surface electrode being made into thevoltage of the first polarity and an electron multiplication beingperformed in the semiconductor substrate, a back-illuminated typesolid-state imaging device which has less noise and improved sensitivitycan be provided.

According to the method for manufacturing the back-illuminated typesolid-state imaging device of the present invention, a back-illuminatedtype solid-state imaging device whose reliability is excellent can bemanufactured in which the electric field to collect the signal chargegenerated in the above-described photoelectric conversion element can begenerated reliably and the crosstalk to the adjacent pixels can bereduced, for example.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic constitutional diagram showing the wholeconfiguration of a back-illuminated type solid-state imaging deviceaccording an embodiment of the present invention;

FIG. 2 is an equivalent circuit diagram corresponding to one pixel ofFIG. 1;

FIG. 3 is a cross-sectional diagram showing a relevant portion of apixel according to a first embodiment of a back-illuminated typesolid-state imaging device of the present invention;

FIG. 4 is a cross-sectional diagram showing a relevant portion of apixel according to a second embodiment of a back-illuminated typesolid-state imaging device of the present invention;

FIGS. 5A through 5C are manufacturing process diagrams (1/5) showing anembodiment of a method for manufacturing a back-illuminated typesolid-state imaging device according to the present invention;

FIGS. 6A through 6C are manufacturing process diagrams (2/5) showing anembodiment of a method for manufacturing a back-illuminated typesolid-state imaging device according to the present invention;

FIGS. 7A through 7C are manufacturing process diagrams (3/5) showing anembodiment of a method for manufacturing a back-illuminated typesolid-state imaging device according to the present invention;

FIGS. 8A and 8B are manufacturing process diagrams (4/5) showing anembodiment of a method for manufacturing a back-illuminated typesolid-state imaging device according to the present invention;

FIG. 9 is a manufacturing process diagram (5/5) showing an embodiment ofa method for manufacturing a back-illuminated type solid-state imagingdevice according to the present invention;

FIG. 10 is a constitutional diagram showing an example of a state whenmounting a back-illuminated type solid-state imaging device according toan embodiment of the present invention;

FIG. 11 is a cross-sectional diagram showing a relevant portion of apixel according to a third embodiment of a back-illuminated typesolid-state imaging device of the present invention; and

FIG. 12 is a cross-sectional diagram showing a relevant portion of apixel according to a fourth embodiment of a back-illuminated typesolid-state imaging device of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Hereinafter, embodiments of the present invention are explained byreferring to the accompanied drawings.

FIG. 1 shows the whole configuration of a back-illuminated typesolid-state imaging device, that is, a CMOS solid-state imaging deviceof a back-illuminated type, according to an embodiment of the presentinvention. A CMOS solid-state imaging device 1 of this embodiment isconfigured to have a pixel portion 2, a control circuit 3, a verticaldrive circuit 4, a column portion 5, a horizontal drive circuit 7, andan output circuit 8.

In the pixel portion 2, a plurality (a large number) of pixels 11 areregularly arranged in a two dimensional manner, in other words, arearrayed in two-dimensional matrix form, for example. The control circuit3 receives an input clock and data that commands an operation mode andthe like, and outputs data including information on the solid-stateimaging device. The vertical drive circuit 4 selects a row of the pixel11 in the pixel portion 2, and supplies a necessary drive pulse to thepixel 11 in that row through a control wiring of in the lateraldirection which is not illustrated.

Here, a vertical signal line 12 is specifically illustrated in thedrawing although the vertical signal line is part of the pixel 11. Anoutput of the pixel 11 of the selected row is sent to the column portion5 through the vertical signal line 12. A column signal processingcircuit 6 is arrayed in the column portion 5 correspondingly to the rowof the pixel 11. The column portion 5 receives a signal by a row of thepixels 11, and processing of CDS (Correlated Double Sampling: processingof fixed pattern noise removal), signal amplification, analogue/digital(ND) conversion, and the like is performed with respect to the signal.

The horizontal drive circuit 7 sequentially selects the column signalprocessing circuit 6, and leads a signal thereof to a horizontal signalline 13. The output circuit 8 processes and outputs the signal read outto the horizontal signal line 13. For example, there is a case whereonly buffering is performed, and there is also a case where anadjustment of a black level, column offset correction, signalamplification, color related processing, and the like are performedbefore that.

FIG. 2 is an example of an equivalent circuit of one pixel. In thisembodiment, a photoelectric conversion element that is a photodiode PD,for example, is connected to a source of a reset transistor 15, and whatis called a floating diffusion FD between the photodiode PD and thesource of the reset transistor 15 is connected to a gate of an amplifiertransistor 16. Specifically, a node electrically connected to the gateof the amplifier transistor 16 is called the floating diffusion FD. Adrain of the reset transistor 15 is connected to a power wiring 17 fromwhich a power source voltage Vdd is supplied, and the gate thereof isconnected to a reset wiring 18 from which a reset pulse is supplied. Adrain of the amplifier transistor 16 is connected to the power wiring17, and a source thereof is connected to a drain of a selectortransistor 19. A selector wiring 20 is connected to a gate of theselector transistor 19. On the other hand, a source of the selectortransistor 19 is connected to the vertical signal line 12, and a loadtransistor 21 whose drain is connected to this vertical signal line 12and which becomes a constant current source is provided as part of thecolumn signal processing circuit 6 (refer to FIG. 1). A load wiring 22is connected to a gate of the load transistor 21.

In this pixel circuit, the photoelectric conversion is performed in thephotodiode PD. A signal charge of the photodiode PD, which is anelectron in this embodiment, is transferred to the gate of the amplifiertransistor 16 through the floating diffusion FD. When the selectortransistor 19 is ON, a signal corresponding to an electric potential ofthe floating diffusion FD is output to the vertical signal line 12through the amplifier transistor 16.

The reset transistor 15 resets the signal charge of the floatingdiffusion FD by discharging the signal charge (electron) of the floatingdiffusion FD into the power wiring 17. Each of the lateral directionwirings 18 and 20 is common to the pixels in the same row and iscontrolled by the vertical drive circuit 4.

In part of the column signal processing circuit 6, the load transistor21 that is a constant current source is provided to constitutes a sourcefollower through the selector transistor 19 of the selected row, andoutput to the vertical signal line 12 is performed.

FIG. 3 shows a cross section of a relevant portion of a pixel in a firstembodiment of a CMOS solid-state imaging device according to the presentinvention. The CMOS solid-state imaging device of this embodimentincludes what is called an SOI substrate 34 which has a siliconsemiconductor film 33 provided on a silicon semiconductor substrate 31through an insulation film 32 that is a buried silicon oxide film, forexample.

In this embodiment, each of the reset transistor 15, amplifiertransistor 16, and selector transistor 19 is formed in the semiconductorfilm 33 on the insulation film 32 of the SOI substrate 34. Specifically,the reset transistor 15 is formed with source-drain regions 36 and 37 ofn-type that is a second conduction type formed in the semiconductor film33 of p-type that is a first conduction type in this embodiment and agate electrode 41 formed through a gate insulation film; the amplifiertransistor 16 is formed with source-drain regions 37 and 38 of n-typeand a gate electrode 42 formed through the gate insulation film; and theselector transistor 19 is formed with source-drain regions 38 and 39 ofn-type and a gate electrode 43 formed through the gate insulation film.

The silicon semiconductor substrate 31 on the lower side of theinsulation film 32 is formed using a high resistance substrate, and inpart of the surface thereof is formed a semiconductor region 45 of thesecond conduction type that is n-type in this embodiment, which becomesa charge accumulation layer of the photodiode PD. A semiconductor layer46 of p-type that is the first conduction type is formed in the surfaceof the other part of the silicon substrate on the lower side of theinsulation film 32. This p-type semiconductor layer 46 reduces a darkcurrent from an interface. With respect to the n-type semiconductorregion 45 of the photodiode PD, an area around a contact portion isformed with a high impurity concentration region, for example, a highimpurity concentration region 47 of approximately 1020 cm-3 and asurrounding area thereof is formed with a low impurity concentrationregion, for example, a low impurity concentration region 48 ofapproximately 1018 cm-3. The high resistance substrate 31 is made ofsuch a high resistance substrate that depletion layers from both thefront and rear surfaces of the substrate are linked when a voltage isapplied to a rear surface electrode as described later on.

The p-type semiconductor layer 46 under the insulation film 32 has animpurity concentration of approximately 1018 cm-3, for example. Theimpurity concentration of the semiconductor substrate that is the highresistance substrate 31 is 1016 cm-3 or less, preferably in the range ofapproximately 1012 cm-3 to 1015 cm-3, and is made to be a low impurityconcentration of approximately 1013 cm-3 in this embodiment. Althoughthe high resistance substrate 31 is n-type in this embodiment, p-typemay also be used. The thickness of the high resistance substrate 31 canbe approximately 10 μm, for example. A p-type semiconductor layer 49having a high impurity concentration of approximately 1019 cm-3, forexample, is formed on the rear surface side of the high resistancesubstrate 31. Further, a rear surface electrode that is a transparentelectrode 51 in this embodiment is formed on the p-type semiconductorlayer 49 on the rear surface side of the substrate through an electroninjection preventive layer 50. The electron injection preventive layer50 can be made of antimony trisulfide by a vacuum evaporation method andp-type amorphous silicon carbide by a plasma CVD, for example. Thetransparent electrode 51 can be made of an ITO (indium tin oxide) filmby a sputtering method, for example.

The transistors 15, 16, and 19 of the pixel 11 are wired reflecting thecircuit diagram of FIG. 2, and the source-drain regions are partlyshared as described above. Specifically, part of the insulation film 32and semiconductor film 33 is removed so that the n-type semiconductorregion 45 of the photodiode PD is exposed, the high concentrationimpurity region 47 of the n-type semiconductor region 45 is connected tothe source-drain region 36 of the reset transistor 15 and to the gateelectrode 42 of the amplifier transistor 16 through the internal wiring,and the circuit connection of FIG. 2 is made.

Next, an explanation is made with respect to an operation of the CMOSsolid-state imaging device of the back-illuminated type according to thefirst embodiment.

In this CMOS solid-state imaging device, light L enters the highresistance substrate 31 of the photodiode PD from the rear surface sideof the substrate through the transparent electrode 51.

The p-type semiconductor layer 46 under the insulation layer 32 is anelectrically floating layer. A negative voltage of −2V, for example, isapplied to the transparent electrode 51 through a terminal BCK. Here,the voltage 0 is a voltage of a GND terminal of the CMOS solid-stateimaging device, or is a body bias of the pixel transistors 15, 16, and19, or is a GND voltage for the load transistor 21 of FIG. 2.

A voltage of the n-type semiconductor region 45 of the photodiode PD isa value dropped from a value close to the power source voltageimmediately after the floating diffusion FD is reset by the resettransistor 15 by means of an inflow of the photoelectron, however thisvalue is limited to a positive value. A mechanism thereof is such thatthe reset transistor 15 is made to be a depletion type whose thresholdvoltage Vth is −0.3V or less and thereby the electron of the floatingdiffusion FD is discharged into the power wiring 17 through the resettransistor 15 when the voltage of the floating diffusion FD becomesclose to 0V.

Since the thickness is around 10 μm and the concentration is low, thehigh resistance substrate 31 is depleted by the negative voltage appliedto this transparent electrode 51, that is, the electric field isgenerated inside the high resistance substrate 31. Because of thiselectric field, the positive hole out of the electron and positive holegenerated inside the high resistance substrate 31 moves toward the rearsurface side of the substrate, and the electron moves toward the n-typesemiconductor region 45 of the photodiode PD, particularly to the highimpurity concentration region 47 thereof. Specifically, in essence theabove-described negative voltage is to make the substrate 31 depletedrather than to be the negative voltage.

Here, since the p-type semiconductor layer 46 is electrically floatingand there is no p-type semiconductor layer applying the bias of 0V tothe pixel 11, no constant current flows between the p-type semiconductorlayer 46 and the transparent electrode 51 on the rear surface.Therefore, a voltage of a large absolute value such as −2V can beapplied to the terminal BCK of the transparent electrode 51, and theelectric field which is large enough to collect the electrons in then-type semiconductor region 45 of the photodiode PD can be generated inthe high resistance substrate 31.

According to the first embodiment of the CMOS solid-state imaging deviceof the back-illuminated type, the SOI substrate is used in which thepixel transistor is formed in the semiconductor layer on the insulationfilm, the semiconductor substrate under the insulation film is made tobe the high resistance substrate, the n-type semiconductor region of thephotodiode is formed in part of the surface thereof, the electricallyfloating p-type semiconductor layer is formed in the other part of thesurface, and the transparent electrode is formed on the rear surfaceside of the high resistance substrate, to which the negative voltage isapplied, and so the large electric field to collect the photoelectronsinto the n-type semiconductor region of the photodiode can be generatedreliably inside the high resistance substrate. Accordingly, thephotoelectron can be moved with further certainty to the n-typesemiconductor region that is the charge accumulation layer, and thecrosstalk to the adjacent pixels can be reduced.

In addition, since the electron injection preventive layer is formedbetween the p-type semiconductor layer and the transparent electrode onthe rear surface side of the high resistance substrate, the injection ofthe electron from the transparent electrode to the inside of the highresistance substrate can be prevented even when the negative voltage isapplied. Further, the insulation film of the SOI substrate also servesas the hole injection preventive layer that prevents the hole from beinginjected into the high resistance substrate.

FIG. 4 shows a cross section of a relevant portion of a pixel in asecond embodiment of a CMOS solid-state imaging device of aback-illuminated type according to the present invention. The CMOSsolid-state imaging device of this embodiment has a structure of theabove-described embodiment of FIG. 3, in which further ann-semiconductor region 54 whose impurity concentration is lower than then-type semiconductor region 45 is formed extending on the front surfaceside of the substrate from part of the portion under the p-typesemiconductor layer 46 to the portion under the n-type semiconductorregion 45, the transparent electrode 51 on the rear surface side of thesubstrate is not provided and a rear surface electrode 55 that alsoserves as a light-shielding film to shield a boundary of pixels isformed on the electron injection preventive film 50 on the rear surfaceside of the substrate, and the same voltage as the rear surfaceelectrode 55 is applied to the p semiconductor layer 46 on the frontsurface side of the substrate through a p+ contact region 56. Theimpurity concentration of the n-semiconductor region 54 can be made intoapproximately 1016 cm-3, for example. The rear surface electrode 55 canbe formed by using a metal film such as an aluminum (Al) film bysputtering, for example.

Since the other structure is the same as FIG. 3, the same referencenumerals are given to corresponding portions, and a redundantexplanation thereof is omitted.

According to the second embodiment of the CMOS solid-state imagingdevice of the back-illuminated type, since the n- semiconductor region54 is provided extending from part of the portion under the p-typesemiconductor region 46 to the portion under the n semiconductor region45 of the photodiode PD, electrons are collected into the n-semiconductor region 54 and are further collected into the n-typesemiconductor region 45. Accordingly, an area to collect electronsincreases, and a color mixture due to the fact that the photoelectronenters an adjacent pixel can be further reduced. Further, since theelectric field generated in the high resistance substrate 31 becomesfurther closer to the vertical by means of the n- semiconductor region54 in comparison to FIG. 3, the direction of the electric field becomesuniform and an unevenness regarding the electron collection can bereduced.

Further, since the rear surface electrode 55 made of a metal film whichalso serves as the light-shielding film is provided, a resistance of therear surface electrode 55 can be lowered in comparison to the case whereonly the transparent electrode is provided. In addition, when a colorfilter is formed for each pixel, light passing through a boundaryportion of the color filters is blocked, and a color mixture caused dueto the above can be prevented.

The electric potential of the p-type semiconductor layer 46 can bestabilized by applying to the p-type semiconductor layer 46 on the frontsurface side of the substrate the same voltage as that to the rearsurface electrode 55.

Other than the above, there can be obtained a similar effectiveness tothe first embodiment of FIG. 3, in which, for example, the electricfield to collect the photoelectrons into the photodiode PD is generatedreliably and the crosstalk to the adjacent pixels can be reduced.

In the structure of FIG. 4, the transparent electrode 51 of FIG. 2 maynot be removed and both the transparent electrode 51 and the rearsurface electrode 55 also serving as the light-shielding film may beformed (refer to FIG. 9).

Three elements in the structure of FIG. 4, which are (1) then-semiconductor region 54, (2) the rear surface electrode 55 thatshields the boundary of pixels, and (3) the application of the samevoltage as the rear surface electrode 55 to the p-type semiconductorlayer 46 on the front surface side of the substrate, are not necessarilyimplemented simultaneously, but it is possible to select appropriatelyany element from (1) through (3) depending on a product to bemanufactured.

For example, in the structure of FIG. 4, the n- semiconductor region 54can be omitted, the p-type semiconductor layer 56 on the front surfaceside of the substrate can be made to be electrically floating, and thetransparent electrode 51 of FIG. 3 can be provided instead of the rearsurface electrode 55. Further, in the structure of FIG. 3, the samevoltage as the transparent electrode 51 can be applied to the psemiconductor layer 46 on the front surface side of the substrate.

Next, an embodiment of a method for manufacturing a back-illuminatedtype solid-state imaging device according to the present invention isexplained using FIGS. 5 through 9. In this embodiment, the presentinvention is applied when manufacturing a CMOS solid-state imagingdevice of the back-illuminated type that includes the n-semiconductorregion 54 and rear surface electrode 55 also serving as the lightshielding film shown in FIG. 4.

First, as shown in FIG. 5A, the SOI substrate 34 is prepared in which onthe silicon semiconductor substrate 31 that is a high resistancesubstrate is provided the silicon semiconductor film 33 of the firstconduction type, for example p-type, through the insulation film (whatis called a buried silicon oxide film) 32. After a protective oxide film61 made of a silicon oxide film, for example, is formed on thesemiconductor film 33 of this SOI substrate 34, the p-type semiconductorlayer 46 is formed by performing ion implantation of a p-type impuritythrough a resist mask 62 into a necessary region of the high resistancesubstrate 31 under the insulation film 32, specifically into a necessaryregion other than a region where an n-type semiconductor region of aphotodiode is formed later on.

Next, as shown in FIG. 5B, an n-type impurity is ion-implanted into anecessary region somewhat deeper than the p-type semiconductor layer 46of the high resistance substrate 31 through a resist mask 63 newlyformed on the protective insulation film 61 to form the n- semiconductorregion 54 constituting part of the photodiode PD.

Next, as shown in FIG. 5C, an unnecessary portion of the semiconductorfilm 33 of the SOI substrate 34 is selectively removed by etchingthrough a resist mask 64.

Next, as shown in FIG. 6A, a MOS transistor is formed by a typical SOIprocess. Specifically, after forming a gate insulation film 67 in thep-type semiconductor film 33 and forming the gate electrodes 41, 42, and43 made of, for example, polycrystalline silicon, the n-typesource-drain regions 36, 37, 38, and 39 are formed by ion implantationto form the reset transistor 15, amplifier transistor 16, and selectortransistor 19. An interlayer insulation film 68 is formed on the surfaceof the gate electrodes 41, 42, and 43.

Next, as shown in FIG. 6B, a necessary region of the insulation film 32is selectively removed by etching through a resist mask 69 to formopenings 70A and 70B.

Next, as shown in FIG. 6C, the n-type semiconductor region 48 to be thecharge accumulation layer of the photodiode PD is formed by ionimplantation through a resist mask 71 to be adjacent to the p-typesemiconductor layer 46 in the vicinity of the interface of the n-semiconductor region 54 corresponding to the opening 70A.

Next, as shown in FIG. 7A, an interlayer insulation film 72 is depositedto cover all the surface including the transistors 15, 16 and 19.

Next, as shown in FIG. 7B, a contact hole 74 to the n-type semiconductorregion 48 is formed in the interlayer insulation film 72 through aresist mask 73. Further, the high concentration n-type impurity ision-implanted to form the n-type high impurity region 47 for the ohmiccontact in the n-type semiconductor region 48. The n-type semiconductorregion 45 that becomes the charge accumulation layer of the photodiodePD is formed by those n-type semiconductor region 48 and n-type highimpurity region 47.

Note that, contact regions to the n-type gate electrode and n-typesource-drain region are also formed at the same time though notillustrated due to a limitation of a space in the drawing.

Next, as shown in FIG. 7C, a contact hole 77 to the p-type semiconductorregion 46 is formed in the interlayer insulation film 72 through aresist mask 76. Further, the high concentration p-type impurity ision-implanted to form the p-type high impurity region 56 for the ohmiccontact in the p-type semiconductor region 46.

Note that, a contact regions to the p-type gate electrode and p-typesource-drain region are also formed at the same time though notillustrated due to the limitation of a space in the drawing.

Next, as shown in FIG. 8A, a multilayer wiring 78 made of a Cu film, forexample, is formed by using a typical wiring process. Although only onelayer of Cu wiring to connect through a buried conduction layer 79 toeach of the n-type high impurity concentration region 47 and p-type highimpurity concentration region 56 is shown in the drawing in order tomake the explanation simplified, a multilayer wiring is formed throughthe interlayer insulation film.

Next, as shown in FIG. 8B, after the high resistance substrate 31 ispolished from the rear surface until reaching a required thickness, thep-type impurity is ion-implanted into the rear surface of the highresistance substrate 31, that is, in the vicinity of the interface toform the p-type semiconductor layer 49 of a high impurity concentrationto suppress the dark current. At this time, similarly to an example inrelated art, the top and bottom are reversed by using a substratesupport material not illustrated, when manufacturing in actuality.

Next, as shown in FIG. 9, the electron injection preventive film 50,transparent electrode 51, and rear surface electrode 55 that also servesas the light-shielding film are sequentially formed on the p-typesemiconductor layer 49. After that, a color filter, an on-chipmicro-lens and the like are formed to obtain an intended CMOSsolid-state imaging device of the back-illuminated type.

According to the method for manufacturing the CMOS solid-state imagingdevice of the back-illuminated type of this embodiment, theback-illuminated type CMOS solid-state imaging device whose reliabilityis excellent can be manufactured in which the electric field to collectthe photoelectron generated in the high resistance substrate 31 of thephotodiode PD is generated reliably and the crosstalk to the adjacentpixels can be reduced.

The CMOS solid-state imaging device manufactured as described above ismounted as shown in FIG. 10. Specifically, the rear surface electrode 55is formed on the rear surface of the semiconductor substrate 31 thatincludes the multilayer wiring 78 and the like, further a CMOSsolid-state imaging device 82 of FIG. 9, in which the color filter,on-chip micro-lens and the like 81 are formed, is connected on the sideof the multilayer wiring 78 by a bump 84 to a package bottom surface orto a circuit substrate 83, and the rear surface electrode 55 and thepackage bottom surface or circuit substrate 83 are connected through abonding wire 85. The semiconductor substrate 31 is sealed with respectto the package bottom surface or the circuit substrate 83 by using aresin sealant 86. Thus, the interface between the CMOS solid-stateimaging device and the outside is made by both the bump 84 and wirebonding.

Further, although not shown in the figure, the CMOS solid-state imagingdevice in FIG. 10 may be formed such that a signal processing chipreplaces the package bottom surface or the circuit substrate 83 and theCMOS solid-state imaging device 82 is in a state of a CMOS image sensorchip to form a micro pad corresponding to the pixel on the front surfaceside of the multilayer wiring thereof, and the micro pad is overlappedand joined to the signal processing chip through a micro bump.

For those skilled in the relevant field, it should be clear that theabove-described CMOS solid-state imaging device shown in FIG. 3 can bemanufactured by eliminating unnecessary processes from the manufacturingmethod of FIGS. 5 through 9 and that various modifications thereof arepossible. For example, it is also possible to reverse the order withrespect to forming the transistor and forming the photodiode in thetypical SOI process of FIG. 6C. Further, part of the ion implantationprocess of the transistor and photodiode can be shared depending on amanufacturing method.

In the CMOS solid-state imaging device of the above-describedembodiments, one pixel is formed with one photodiode and threetransistors; further, it is also possible to form one pixel with onephotodiode and four transistors to which a transfer transistor is added.FIGS. 11 and 12 show embodiments thereof.

FIG. 11 is a cross section showing a relevant portion of a pixelaccording to a third embodiment of a CMOS solid-state imaging device ofa back-illuminated type of the present invention. In this embodiment, atransfer transistor 91 is added to the side of the semiconductor film 33of the SOI substrate 34. Specifically, the transfer transistor 91, resettransistor 15, selector transistor 19, and amplifier transistor 16 areformed in the semiconductor film 33. In this pixel, the high impurityconcentration region 47 of the n-type semiconductor region 45 of thephotodiode PD is connected to a source of the transfer transistor 91,and a drain of the transfer transistor 91 is connected to the source ofthe reset transistor 15. The floating diffusion FD that is a connectionmidpoint between the transfer transistor 91 and the reset transistor 15is connected to the gate of the amplifier transistor 16. The source ofthe amplifier transistor 16 is connected to the vertical signal line,and the drain thereof is connected to the source of the selectortransistor 19. In addition, the drain of the reset transistor 15 and thedrain of the selector transistor 19 are connected to the power wiringthat supplies the power Vdd.

Since the other structure than the above can be similar to theabove-described various embodiments such as shown in FIGS. 3 and 4, adetailed explanation thereof is omitted.

FIG. 12 is a cross section showing a relevant portion of a pixelaccording to a fourth embodiment of a CMOS solid-state imaging device ofa back-illuminated type of the present invention. In this embodiment,the transfer transistor 91 is added to the side of the high resistancesubstrate 31 of the SOI substrate 34. Specifically, the reset transistor15, selector transistor 19, and amplifier transistor 16 are formed onthe side of the semiconductor film 33 of the SOI substrate 34. On theother hand, the n-type semiconductor region 45 that becomes the chargeaccumulation layer of the photodiode PD is formed under the psemiconductor layer 46 on the side of the high resistance substrate 31,further an n-type source-drain region 94 is formed on the side of aninterface in a p-type semiconductor well region 93, a gate electrode 95is formed through a gate insulation film on the high resistancesubstrate 31 between the n-type semiconductor region 45 of thephotodiode PD and the n-type source-drain region 94, and the transfertransistor 91 is here formed. The wirings of the photodiode PD and eachof the transistors 91, 15, 16, and 19 are similar to those in FIG. 11.In addition, a channel region whose p-type impurity concentration isadjusted is formed directly under the gate electrode 95.

Since the p-type semiconductor layer 46 of the high impurityconcentration is formed on the side of the interface of the n-typesemiconductor region 45 of the photodiode PD, a buried type photodiodePD called a HAD (Hole Accumulation Diode) is formed.

Since the other structure than the above can be similar to theabove-described various embodiments such as shown in FIGS. 3 and 4, adetailed explanation thereof is omitted.

In the above-described embodiments, the negative voltage is fixedlyapplied to the rear surface electrode (to the transparent electrode 51or rear surface electrode 55); in addition, an electronic shutteroperation can also be performed without fixing the voltage applied. Forexample, by temporarily applying a positive voltage to the rear surfaceelectrode, the charge (electron) accumulated in the photodiode PD isdischarged to the rear surface electrode to simultaneously reset thephotodiodes PD of all the pixels and so what is called a electronicshutter operation can be performed.

In addition, when the negative voltage applied to the rear surfaceelectrode is further increased to, for example, approximately −40V inthe above-described embodiments, the electric field of the highresistance substrate 31 is intensified, so that an electron avalanchephenomenon occurs while the electron moves to the front surface side andthe number of electrons can be multiplied. Specifically, the sensitivitycan be raised several tens of times, for example, by causing theelectronic multiplication. Accordingly, a CMOS solid-state imagingdevice of a back-illuminated type with less noise and high sensitivitycan be provided.

Although the electron multiplication is performed in a film (HARP filmof NHK is known) laminated on the upper side of the wiring, a similarphenomenon can be caused on the rear surface with the structure of theabove-described embodiments. Since the laminated film uses an amorphousfilm, there are many defects, large dark current and large lag; however,in the back-illuminated type, with a monocrystal silicon, for example,being used, such effectiveness of less defects, less dark current, andsmall lag can be obtained.

Although in the above-described embodiments the electron is used as thesignal charge, the hole can be used as the signal charge. When the holeis used as the signal charge, the conduction type of the semiconductorsubstrate, semiconductor layer, photodiode and the like in theabove-described structure is reversed and in addition, the pixeltransistor is also formed using a transistor of the opposite polarity.

According to the above-described embodiments of the present invention,since the SOI substrate is used and after separating the photodiode andthe transistor portion the rear surface electrode is provided and thevoltage is applied thereto, the electric field can be formed reliablyeven in a photodiode having a high aspect ratio, and the CMOSsolid-state imaging device of the back-illuminated type in which thecrosstalk to the adjacent pixels is reduced can be provided. Further,the CMOS solid-state imaging device of the back-illuminated type inwhich the electronic shutter operation is performed simultaneously withrespect to all the pixels can be provided by controlling the voltageapplied to the rear surface electrode. Further, the CMOS solid-stateimaging device of the back-illuminated type in which electronmultiplication is performed in a silicon substrate and which has lessnoise and an improved sensitivity can be obtained.

It should be understood by those skilled in the art that variousmodifications, combinations, sub-combinations and alterations may occurdepending on design requirements and other factors insofar as they arewithin the scope of the appended claims or the equivalents thereof.

What is claimed is:
 1. A back-illuminated type solid-state imagingdevice comprising: a semiconductor layer on a front surface side of asemiconductor substrate with an insulation film between them; aphotoelectric conversion element that constitutes a pixel in saidsemiconductor substrate, the photoelectric conversion element includinga charge accumulation portion, the charge accumulation portion includesa plurality of impurity regions and a high impurity region formeddirectly between the plurality of impurity regions; at least part oftransistors that constitute said pixel are included in saidsemiconductor film; and a rear surface electrode on the rear surfaceside of said semiconductor substrate to which a negative voltage isapplied, the rear surface electrode being transparent, wherein, asemiconductor layer of an opposite conduction type to the chargeaccumulation portion of said photoelectric conversion element is formedin a portion of the semiconductor substrate under said insulation film,and a semiconductor layer of an opposite conduction type to a chargeaccumulation portion of said photoelectric conversion element is formedin the semiconductor substrate under said insulation film.
 2. Theback-illuminated type solid-state imaging device according to claim 1,wherein: the semiconductor substrate is a high resistance substrate, andthe transistors include a reset transistor, an amplifier transistor, anda selector transistor.
 3. The back-illuminated type solid-state imagingdevice according to claim 2, wherein a source of the reset transistor isconnected to the photoelectric conversion element.
 4. Theback-illuminated type solid-state imaging device according to claim 3,wherein: the electrically floating semiconductor layer is connectedbetween the photoelectric conversion element and the source of the resettransistor, and the source of the reset transistor is connected to agate of the amplifier transistor.
 5. The back-illuminated typesolid-state imaging device according to claim 4, wherein a drain of thereset transistor is connected to a power wiring and a gate of the resettransistor is connected to reset wiring through which a reset pulse isreceived.
 6. The back-illuminated type solid-state imaging deviceaccording to claim 5, wherein: a drain of the amplifier transistor isconnected to the power wiring, and a source of the amplifier transistoris connected to a drain of the selector transistor.
 7. Theback-illuminated type solid-state imaging device according to claim 6,wherein: a selector wiring is connected to a gate of the selectortransistor, a source of the selector transistor is connected to avertical signal line, a gate of a load transistor is connected to thevertical signal line, and a gate of the load transistor is connected toa load wiring.
 8. The back-illuminated type solid-state imaging deviceaccording to claim 2, wherein the reset transistor resets a signalcharge of the electrically floating semiconductor layer by dischargingthe signal charge of the electrically floating semiconductor layer intopower wiring.
 9. The back-illuminated type solid-state imaging deviceaccording to claim 2, wherein: source-drain regions of the resettransistor, the amplifier transistor, and the selector transistor are offormed in the charge accumulation region, the charge accumulation regionis of n-type.
 10. The back-illuminated type solid-state imaging deviceaccording to claim 1, wherein the semiconductor layer of the oppositeconduction type is of p-type.
 11. The back-illuminated type solid-stateimaging device according to claim 9, wherein: the p-type semiconductorlayer has an impurity concentration of approximately 1018 cm-3, and animpurity concentration of the high resistance substrate is between 1012cm-3 and 1015 cm-3.
 12. The back-illuminated type solid-state imagingdevice according to claim 1, wherein the negative voltage is applied togenerate a large electric field to collect photoelectrons into thecharge accumulation portion.